Chip Hack was a two day workshop that ran over the weekend of 20th and 21st April and provided an introduction to FPGA programming for complete beginners.
We've had many OSHUG talks about FPGAs and impressive projects that make use of them, and it's not the first time I've written about them here. However, it's an area of technology where I previously had no practical experience and I must admit to having found HDL equally as daunting as I find FPGA technology exciting!
I was therefore delighted to be involved in organising a weekend long introduction to FPGA programming called Chip Hack, scheduled to coincide with Hardware Freedom Day, with veteran FPGA hackers running the workshop and Embecosm sponsoring the event.
The first presentation was by Omer Kilic and this provided a general introduction to programmable logic technology, workflows and uses. This was based on a presentation that Omer had previously given at an OSHUG meeting and did a perfect job of setting the scene for what was to come.
Saar Drimer had the unenviable job of trying to shoe horn an introduction to Verilog into 30 minutes! The idea being that we should move to practical hands-on exercises as soon as possible, so that we can then learn through doing.
In retrospect, 30 minutes was far too short, but more on this later.
First there were preprepared exercises that implemented things such as simple counter, that were then followed by two guided projects of greater complexity.
The final exercise was to complete a partially implemented UART transmitter, confirming operation using a USB-UART adapter with terminal emulation software.
Sunday afternoon Julian Baxter of OpenRISC provided an introduction to the project and its reference system-on-chip design. With one example that implemented a fully Linux-capable SoC on the DE0-Nano boards we were using, running “bare metal” code on the OpenRISC processor, which read its accelerometers and displayed an output on the board's LEDs.
The final talk came from Jeremy Bennett, who provided an introduction to using Verilog with open source tools such as Verilator and GTKWave for hardware modelling.
Perhaps not surprisingly for anyone who has done FPGA development, one of the biggest challenges was getting people up and running with the tools. Although we had said that people should install these in advance, we should probably have also provided an example project that they could use to verify their correct operation and to familiarise themselves with synthesis.
As mentioned previously, 30 minutes was also far too short for the Verilog introduction — a concern that Saar did voice beforehand, and which will be taken on board if we run another Chip Hack event.
There are also other opportunities for tuning the schedule, in terms of the duration and running order of talks. However, in general the spread of topics covered seemed to work well, and even though people weren't hacking on the OpenRISC processor by the end of day two, having a session on this demonstrated in the best way possible just how far people can take HDL development!
The Chip Hack examples and documentation are being made freely available to all via a GitHub repository, and the plan is that we'll do further work on these over the coming weeks and months, with a view to perhaps organising another event later in the year. Of course, the hope is that others will find these useful and may decide to run their own Chip Hack events too.
Finally, I'd like to express my thanks to Omer Kilic, Saar Drimer, Julius Baxter, Jeremy Bennett and Simon Cook, for all the hard work they put in during the weeks leading up to Chip Hack and on the day.Like this Leave a comment